In Programmed I/O mode, how does the CPU determine if an I/O device is ready for data transfer?
In Programmed I/O, the CPU repeatedly reads and checks the status bit of the I/O device interface (busy-waiting/polling) until the device is ready.
What is the main drawback of Programmed I/O compared to Interrupt-Driven I/O?
Because the CPU must repeatedly check the status register of the I/O device in Programmed I/O, it cannot perform useful processing while waiting, wasting clock cycles.
In Memory-Mapped I/O scheme, how are I/O ports addressed and accessed by the CPU?
In Memory-Mapped I/O, I/O registers occupy locations in the physical memory address space, allowing normal memory manipulation instructions to read and write I/O devices.
In Isolated I/O (I/O-Mapped I/O) scheme, how does the CPU distinguish an I/O read/write cycle from a memory read/write cycle?
Isolated I/O uses a separate address space for I/O ports and uses dedicated control lines (IOR#/IOW# or M/IO# signal) to differentiate I/O bus cycles from memory cycles.
Which of the following is an advantage of Memory-Mapped I/O over Isolated I/O?
Since I/O registers are treated as memory locations in Memory-Mapped I/O, all memory addressing modes (indexed, indirect, etc.) and instructions (ADD, INC, Bit Test) can operate on I/O ports directly.