Which of the following is an example of a synchronous exception generated during program execution?
Divide-by-zero and page-fault conditions are synchronous exceptions associated with the execution of an instruction. A page fault is detected by the memory-management hardware as part of the instruction's memory access.
A system has 4 interrupt levels L0, L1, L2, L3 with L3 having highest priority. ISR for L1 takes 10 ms. While executing L1, L3 occurs at $t = 3 ms$. How much total time elapses from the start of L1 until L1 completes execution?
Since L3 has higher priority than L1, L3 preempts L1. L1 resumes after L3 finishes. Total wall clock time = L1 execution time (10 ms) + L3 execution time.
What is the purpose of the Interrupt Mask Register inside a Programmable Interrupt Controller (e.g., Intel 8259A)?
The Interrupt Mask Register (IMR) stores bits that individually inhibit (mask) or allow (unmask) interrupt request lines IR0-IR7.
In 8085 microprocessor, which restart interrupt is edge-sensitive as well as level-sensitive?
TRAP requires both a rising edge and a high level to be recognized, protecting it against false noise triggers.
In 8085 microprocessor, which restart interrupt is strictly edge-triggered?
RST 7.5 is strictly positive-edge triggered and stores its request in an internal D flip-flop until serviced or cleared.