Which processor state information is typically preserved on entry to a hardware interrupt so that the interrupted program can later resume correctly?
The return address (PC) and processor status/flags must be preserved by the interrupt mechanism; additional registers may also be saved depending on the architecture and ISR convention.
What characterizes a vectored interrupt?
In a vectored interrupt system, hardware supplies or derives a vector identifying the appropriate interrupt-service routine, avoiding the need to poll every device to identify the source.
What is a Non-Maskable Interrupt (NMI)?
NMI pins bypass internal interrupt mask flip-flops, ensuring the CPU responds immediately to critical events like power failure or hardware memory error.
In the 8085 microprocessor, which hardware interrupt pin is non-maskable and has the highest priority?
TRAP is the highest-priority non-maskable interrupt in 8085 architecture, triggered by both edge and level transitions.
In Daisy Chaining hardware priority scheme for interrupts, how is priority determined among multiple requesting devices?
Daisy chaining passes an Interrupt Grant signal serially from device to device. The device physically closest to the CPU receives the grant first, giving it highest priority.