Consider a logical address space of 32 pages of 1 KB each, mapped onto a physical memory of 64 frames. How many bits are required in the logical address?
Logical Address = Page Number + Offset. 32 pages = $2^5$ (5 bits). 1 KB page size = $2^10$ bytes (10 bits offset). Total logical address bits = 5 + 10 = 15 bits.
In a paging system, page size is 4 KB and page table entry size is 4 bytes. What is the maximum size of a single-level page table for a 32-bit logical address space?
$Number of pages = 2^32 / 2^12 = 2^20 pages. Size of page table = 2^20 entries * 4 bytes = 4 MB.$
In a system with Demand Paging, the page fault service time is 10 ms and memory access time is 100 ns. If the effective access time is to be at most 200 ns, what is the maximum acceptable page fault rate?
$Effective Access Time EAT = (1 - p)*100ns + p*10,000,000ns <= 200ns. 100 + 9,999,900 p <= 200 => p <= 100 / 10^7 = 1 / 100,000.$
Which page replacement algorithm suffers from Belady's Anomaly?
Belady's Anomaly states that for some page-replacement algorithms (like FIFO), the page-fault rate may increase as the number of allocated page frames increases.
In an Inverted Page Table, the size of the page table is proportional to the size of:
An Inverted Page Table has one entry for each real page (frame) of physical memory, regardless of the logical address space size or number of processes.