GATE CSE Memory Management & Virtual Memory – OS Practice Test

GATE CSE Memory Management & Virtual Memory – OS Practice Test | Set 1

Questions 31-35 of 100

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Question 31

MCQ · Single Correct 2 mark

Consider a system with 64-bit virtual addresses, 4 KB page size, and 8-byte page table entries. In a multi-level paging system where every level page table fits in one page, how many levels of page tables are required? (Question 31)

A 3 levels B 4 levels C 5 levels D 6 levels

Question 32

MCQ · Single Correct 1 mark

A process references pages in the order: 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5. Using LRU page replacement with 3 page frames initially empty, how many page faults occur? (Question 32)

A 10 B 11 C 9 D 8

Question 33

MCQ · Single Correct 2 mark

Which memory partitioning scheme avoids external fragmentation completely? (Question 33)

A Fixed Partitioning B Pure Segmentation C Dynamic Partitioning D Paging

Question 34

MCQ · Single Correct 1 mark

In a segmented memory system, segment 2 has base 2000 and limit 500. Which physical address corresponds to logical address <2, 350>? (Question 34)

A 2350 B 1650 C 2500 D Trap / Segmentation Fault

Question 35

MCQ · Single Correct 2 mark

What is the purpose of the Dirty Bit (Modified Bit) in a Page Table Entry? (Question 35)

A To indicate if the page is read-only B To protect the page from execution C To indicate whether the page has been written to and needs to be written back to disk on eviction D To measure page age for FIFO replacement