GATE CSE Memory Management & Virtual Memory – OS Practice Test

GATE CSE Memory Management & Virtual Memory – OS Practice Test | Set 1

Questions 36-40 of 100

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Question 36

MCQ · Single Correct 1 mark

Consider a system with 64-bit virtual addresses, 4 KB page size, and 8-byte page table entries. In a multi-level paging system where every level page table fits in one page, how many levels of page tables are required? (Question 36)

A 6 levels B 5 levels C 4 levels D 3 levels

Question 37

MCQ · Single Correct 2 mark

A process references pages in the order: 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5. Using LRU page replacement with 3 page frames initially empty, how many page faults occur? (Question 37)

A 11 B 10 C 8 D 9

Question 38

MCQ · Single Correct 1 mark

Which memory partitioning scheme avoids external fragmentation completely? (Question 38)

A Fixed Partitioning B Pure Segmentation C Paging D Dynamic Partitioning

Question 39

MCQ · Single Correct 2 mark

In a segmented memory system, segment 2 has base 2000 and limit 500. Which physical address corresponds to logical address <2, 350>? (Question 39)

A 2500 B Trap / Segmentation Fault C 1650 D 2350

Question 40

MCQ · Single Correct 1 mark

What is the purpose of the Dirty Bit (Modified Bit) in a Page Table Entry? (Question 40)

A To protect the page from execution B To indicate if the page is read-only C To measure page age for FIFO replacement D To indicate whether the page has been written to and needs to be written back to disk on eviction