GATE CSE Memory Management & Virtual Memory – OS Practice Test

GATE CSE Memory Management & Virtual Memory – OS Practice Test | Set 1

Questions 41-45 of 100

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Question 41

MCQ · Single Correct 2 mark

Consider a system with 64-bit virtual addresses, 4 KB page size, and 8-byte page table entries. In a multi-level paging system where every level page table fits in one page, how many levels of page tables are required? (Question 41)

A 3 levels B 4 levels C 6 levels D 5 levels

Question 42

MCQ · Single Correct 1 mark

A process references pages in the order: 1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5. Using LRU page replacement with 3 page frames initially empty, how many page faults occur? (Question 42)

A 8 B 10 C 9 D 11

Question 43

MCQ · Single Correct 2 mark

Which memory partitioning scheme avoids external fragmentation completely? (Question 43)

A Dynamic Partitioning B Pure Segmentation C Paging D Fixed Partitioning

Question 44

MCQ · Single Correct 1 mark

In a segmented memory system, segment 2 has base 2000 and limit 500. Which physical address corresponds to logical address <2, 350>? (Question 44)

A 2350 B 1650 C 2500 D Trap / Segmentation Fault

Question 45

MCQ · Single Correct 2 mark

What is the purpose of the Dirty Bit (Modified Bit) in a Page Table Entry? (Question 45)

A To measure page age for FIFO replacement B To indicate whether the page has been written to and needs to be written back to disk on eviction C To protect the page from execution D To indicate if the page is read-only