In auto-increment addressing mode, when is the register incremented?
In the common auto-increment form, the effective address is taken from the register and the register is then incremented by the operand size.
A CPU has 24-bit instructions. A program starts at decimal memory address 300. Which of the following is a legal program counter value in decimal?
Each instruction is 24 bits = 3 bytes long. Valid PC values start at 300 and increase in steps of 3 (300 + 3k). 600 = 300 + 3(100), which is valid.
Multiplicand $M = 0101 (+5)$ and Multiplier $Q = 1101 (-3)$ are multiplied using 2's complement Booth's Algorithm. What is the 8-bit product?
+5 * -3 = -15 decimal. 15 in binary = 00001111. 2's complement of 15 = 11110001 (-15 decimal).
In Booth's multiplication algorithm for two 8-bit signed integers, what is the maximum number of addition/subtraction operations required in the worst-case multiplier pattern (01010101)?
Multiplier 01010101 has 8 bit transitions, causing an addition or subtraction at every step (8 total).
In Booth's recoding of multiplier bits ($Q_{i}$, $Q_{i-1}$), what operation is performed when ($Q_{i}$, $Q_{i-1}$) = (1, 0)?
In Booth's recoding, (1,0) triggers subtraction of multiplicand M from accumulator A followed by right shift.