Which PLD architecture features a FIXED AND array followed by a PROGRAMMABLE OR array?
PROM (Programmable Read-Only Memory) has a fixed AND array (full decoder) and a programmable OR array.
Which PLD structure incorporates a PROGRAMMABLE AND array followed by a FIXED OR array?
PAL features a programmable AND array fed into a fixed OR array, making it easier to manufacture and program than PLA.
Which logic circuit compares two 1-bit binary inputs A and B and yields HIGH when $A = B$?
Equality bit comparison ($A = B) evaluates$ to 1 when both bits are equal (00 or 11), implemented by an XNOR gate.
What is the function of a 3-to-8 line decoder with active-HIGH outputs?
A 3-to-8 decoder decodes 3 binary inputs to activate exactly one of 8 minterm output lines (Y0 through Y7).
How many 3-to-8 line decoders with enable inputs are needed to construct a 4-to-16 line decoder?
Two 3-to-8 decoders can be combined with 1 inverter on the 4th high-order input bit connected to their enable inputs to create a 4-to-16 decoder.