ISRO CSE 2020 PYQ

Detailed Explanation:

Immediate addressing mode specifies the operand value directly within the instruction.

Statement 1 is true: It is commonly used to load constants or initial values into registers (e.g., MOV R1, #5).

Statement 2 is true: It allows arithmetic/logical operations directly with immediate constants (e.g., ADD R1, #10).

Detailed Explanation:

Program Counter (PC) holds the memory address of the NEXT instruction to be fetched, not the instruction currently in execution (which is stored in the Instruction Register).

Detailed Explanation:

Data bus width affects the number of bits transferred per clock cycle.

Clock speed determines execution cycles per second.

Address bus size determines memory addressability, not processing speed.

Detailed Explanation:

Prefix expression: - * + A B C * - D E + F G

Left operand of '-' is '* + A B C' = ((A + B) * C).

Right operand of '-' is '* - D E + F G' = ((D - E) * (F + G)).

Detailed Explanation:

Big Endian layout: Two 2-byte integers. Integer 1 = 0x1234 (at 0x101-0x102), Integer 2 = 0x5678 (at 0x103-0x104).

For Integer 1 (0x1234): Little endian stores LSB (0x34) at 0x101 and MSB (0x12) at 0x102.

For Integer 2 (0x5678): Little endian stores LSB (0x78) at 0x103 and MSB (0x56) at 0x104.